Category:I600 Introduction to Computers and Informatics - Revision history

Lvosandi: /* Full adder */

2017-12-12T08:55:30Z

Full adder

← Older revision		Revision as of 11:55, 12 December 2017
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	==Full adder==		==Full adder==

	You can double your points if you manage to wire up a full adder (+4p)		You can double your points if you manage to wire up a full adder (+5p)

	[[File:Nand-full-adder.png]]		[[File:Nand-full-adder.png]]
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	[[File:Full-~~adder_bb~~.png\|700px]]		[[File:Full-adder.png\|700px]]

2017-12-12T08:53:17Z

Half adder

← Older revision		Revision as of 11:53, 12 December 2017
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	Use breadboard to wire up half adder with 7400 chips (4p):		Use breadboard to wire up half adder with 7400 chips (4p):

	[[File:Half-~~adder_bb~~.png\|700px]]		[[File:Half-adder.png\|700px]]

	The truth table for half adder:		The truth table for half adder:

2017-12-12T08:50:05Z

Assignment: Adders with NAND gates (5p)

← Older revision		Revision as of 11:50, 12 December 2017
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	Each ~~SN74HC03N~~ chip contains four NAND gates arranged like this, observe the pit on the left. VCC corresponds to 5V power supply and GND corresponds to ground or 0V.		Each CD74HC00E chip contains four NAND gates arranged like this, observe the pit on the left. VCC corresponds to 5V power supply and GND corresponds to ground or 0V.


	==Half adder==		==Half adder==

	Each [http://www.ti.com/lit/gpn/sn74hc03 ~~SN74HC03~~] contains 4 NAND gates.		Each [http://www.ti.com/lit/gpn/sn74hc03 CD74HC00E] contains 4 CMOS NAND gates.
	Use breadboard to wire up half adder with 7400 chips (4p):		Use breadboard to wire up half adder with 7400 chips (4p):

2017-11-28T16:21:43Z

Assignment: Debugging ALU design (5p)

← Older revision		Revision as of 19:21, 28 November 2017
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	Assignment steps		Assignment steps

	* ~~For~~ the repo on GitHub, clone your repo, fix mistakes, commit and push changes, send link to your GitHub repo where you have fixed the issues (5p)		* Fork the repo on GitHub, clone your repo, fix mistakes, commit and push changes, send link to your GitHub repo where you have fixed the issues (5p)
	* Optional/extra: Expand ALU to 8 bits (2p)		* Optional/extra: Expand ALU to 8 bits (2p)
	* Optional/extra: Add another opcode bit and implement multiplication so opcode(2) high means we're doing multiplication, opcode(1) in case of multiplication selects between higher and lower bits of the result and opcode(0) is used to negate the second operand of multiplication. (+5p)		* Optional/extra: Add another opcode bit and implement multiplication so opcode(2) high means we're doing multiplication, opcode(1) in case of multiplication selects between higher and lower bits of the result and opcode(0) is used to negate the second operand of multiplication. (+5p)

2017-11-28T16:21:29Z

Assignment: Debugging ALU design (5p)

← Older revision		Revision as of 19:21, 28 November 2017
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	However there are few bugs in <code>alu.vhd</code>, find the bugs and correct them. If this is your first experience with VHDL, take a look [http://lauri.vosandi.com/hdl/ here].		However there are few bugs in <code>alu.vhd</code>, find the bugs and correct them. If this is your first experience with VHDL, take a look [http://lauri.vosandi.com/hdl/ here].

	Optional/extra: Expand ALU to 8 bits (3p)		Assignment steps
	Optional/extra: Add another opcode bit and implement multiplication so opcode(2) high means we're doing multiplication, opcode(1) in case of multiplication selects between higher and lower bits of the result and opcode(0) is used to negate the second operand of multiplication. (+5p)
			* For the repo on GitHub, clone your repo, fix mistakes, commit and push changes, send link to your GitHub repo where you have fixed the issues (5p)
			* Optional/extra: Expand ALU to 8 bits (2p)
			* Optional/extra: Add another opcode bit and implement multiplication so opcode(2) high means we're doing multiplication, opcode(1) in case of multiplication selects between higher and lower bits of the result and opcode(0) is used to negate the second operand of multiplication. (+5p)

	=Assignment: Adders with NAND gates (5p)=		=Assignment: Adders with NAND gates (5p)=

2017-11-28T16:19:22Z

Assignment: Debugging ALU design (5p)

← Older revision		Revision as of 19:19, 28 November 2017
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	However there are few bugs in <code>alu.vhd</code>, find the bugs and correct them. If this is your first experience with VHDL, take a look [http://lauri.vosandi.com/hdl/ here].		However there are few bugs in <code>alu.vhd</code>, find the bugs and correct them. If this is your first experience with VHDL, take a look [http://lauri.vosandi.com/hdl/ here].

			Optional/extra: Expand ALU to 8 bits (3p)
			Optional/extra: Add another opcode bit and implement multiplication so opcode(2) high means we're doing multiplication, opcode(1) in case of multiplication selects between higher and lower bits of the result and opcode(0) is used to negate the second operand of multiplication. (+5p)

	=Assignment: Adders with NAND gates (5p)=		=Assignment: Adders with NAND gates (5p)=

2017-11-28T07:49:31Z

Assignment: Adders with NAND gates (5p)

@@ Line 989: / Line 989: @@
        printf("largest number is: %d", max(nums, 5));
+   }
 =Assignment: Adders with NAND gates (5p)=
@@ Line 1,127: / Line 1,165: @@
       test(1, 1, 1);
+  }
 =Deprecated assignment: Investigating microcontrollers=

2017-11-21T13:26:16Z

@@ Line 184: / Line 184: @@
 * Given ~10 instructions and their explainations, follow the instructions and elaborate after every step what happened in the processor?
 =Lecture: Introduction to Boole algebra=
@@ Line 267: / Line 255: @@
 * What were the major contributing factors for success of Microsoft, Apple, Google, <your favourite company>?
 * What were the major contributing factors to the success of Silicon Valley?

2017-11-21T10:03:24Z

Assignment: Debugging ALU design

← Older revision		Revision as of 13:03, 21 November 2017
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	}		}

	=Assignment: Debugging ALU design=		=Assignment: Debugging ALU design (5p)

	Bob had to ship the ALU design to the hardware manufacturer by yesterday. The project manager is angry about missed deadline. Bob still hasn't figured out why the ALU is not working properly. Help Bob by figuring out what's the problem.		Bob had to ship the ALU design to the hardware manufacturer by yesterday. The project manager is angry about missed deadline. Bob still hasn't figured out why the ALU is not working properly. Help Bob by figuring out what's the problem.
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	However there are few bugs in <code>alu.vhd</code>, find the bugs and correct them. If this is your first experience with VHDL, take a look [http://lauri.vosandi.com/hdl/ here].		However there are few bugs in <code>alu.vhd</code>, find the bugs and correct them. If this is your first experience with VHDL, take a look [http://lauri.vosandi.com/hdl/ here].



	=Deprecated assignment: Investigating microcontrollers=		=Deprecated assignment: Investigating microcontrollers=

2017-11-21T10:03:13Z

Assignment: Adders with NAND gates

← Older revision		Revision as of 13:03, 21 November 2017
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	}		}

	=Assignment: Adders with NAND gates=		=Assignment: Adders with NAND gates (5p)=

	In this assignment we use chips to build an adder. Get max points (4p) by wiring up half adder and double your points (8p) if you can make full adder work as well :)		In this assignment we use chips to build an adder. Get max points (4p) by wiring up half adder and double your points (8p) if you can make full adder work as well :)